Clocked DAC current switch

Details Clocked DAC current switch Clocked DAC current switch

2007-01-02

2007-01-02

Barnie, Rexford (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S133000, C341S136000

Reexamination Certificate

active

10761790

ABSTRACT:
A switch having a first arrangement for providing a first set of first and second complementary intermediate signals; a second arrangement for providing a second set of third and fourth complementary intermediate signals; a third arrangement responsive to the first set of signals for providing complementary output signals; a fourth arrangement responsive to the second set of signals for providing complementary output signals; and a fifth arrangement for selectively activating the third means or the fourth arrangement in response to a control signal.

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R. Adams, Khiem Nguyen & K. Sweetland, “A 113dB SNR Oversampling DAC with Segmented Noise-shaped Scrambling,” IEEE International Symposium on Circuits and Systems, 1998, pp. 62-64, no month.
K.T. Chan & K.W. Martin, “Components for a GAAS Delta-Sigma Modulator Oversampled Analog-To-Digital Converter,” IEEE International Symposium on Circuits and Systems, 1992, pp. 1300-1303, no month.

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