Clocked and non-clocked repeater insertion in a circuit design

Details Clocked and non-clocked repeater insertion in a circuit design Clocked and non-clocked repeater insertion in a circuit design

2005-06-21

2005-06-21

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C703S016000

Reexamination Certificate

active

06910196

ABSTRACT:
A method and apparatus to obtain minimum cycle latency and maximum required time at a driver for an assignment of clocked and non-clocked repeaters in a topology comprising, determining whether a node in the topology is a leaf, and assigning covers if the node is a leaf. Determining whether the node in the topology comprises one branch or two branches. Assigning covers to each node and eliminating inferior covers. Merging covers, and deleting inferior covers taking into account a difference in interconnect latency associated with the covers. The above method may be modified with a heuristic to insert repeaters in a topology for a given latency at each driver-receiver pair.

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