Clock translator and parallel to serial converter

Details Clock translator and parallel to serial converter Clock translator and parallel to serial converter

2006-02-16

2008-11-18

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Reexamination Certificate

active

07453288

ABSTRACT:
A system and method for using one or more clock signals is disclosed. The system includes a clock translator that has a first input to receive a first reference clock signal and a second input to receive a second reference clock signal. The clock translator also includes an output to provide a bit rate clock signal having a clock frequency in a first ratio with respect to the frequency of the first reference clock but having a resolution based on at least a portion of the second reference clock signal. The second reference clock has a faster rate than the first reference clock.

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