Clock throttling based on activity-level signals

Details Clock throttling based on activity-level signals Clock throttling based on activity-level signals

2011-06-07

2011-06-07

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Optimization

C716S101000, C716S132000, C713S322000

Reexamination Certificate

active

07958483

ABSTRACT:
An embodiment of the invention includes receiving an indicator of an activity-level of a functional block within an electronic chip. The functional block is configured to receive a clock signal from a clock signal generator. The clock signal to at least a portion of a functional block is disabled for a number of inactive clock cycles during a clock segment of the clock signal. The clock segment has a specified number of clock cycles and the number of inactive clock cycles is defined based on the activity-level and the specified number of clock cycles of the clock segment.

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