Clock synchronous memory

Details Clock synchronous memory Clock synchronous memory

1999-07-15

2000-10-31

Phan, Trong

Static information storage and retrieval

Read/write circuit

Signals

365233, G11C 700, G11C 800

Patent

active

061412651

ABSTRACT:
A clock synchronous memory capable of accurately synchronizing a clock with data is provided. The clock synchronous memory has a fine delay control circuit for precisely synchronizing a clock with data. The fine delay control circuit uses a first type delay unit and a second type delay unit and allows the clock to pass through at least one of the first and second type delay units, thereby finely adjusting a delay time of the clock.

REFERENCES:
patent: 5946244 (1999-08-01), Manning
patent: 5946268 (1999-08-01), Iwamoto et al.
patent: 5963502 (1999-10-01), Watanabe et al.
patent: 5986949 (1999-11-01), Toda

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