Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2006-04-12
2010-12-28
Pathak, Sudhanshu C (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S371000, C375S147000, C375S324000, C375S327000, C375S356000, C713S400000, C370S497000
Reexamination Certificate
active
07860205
ABSTRACT:
A timestamp-based clock synchronization technique is employed for CES in packet networks. The technique is based on a double exponential filtering technique and a linear process model. The linear process model is used to describe the behavior of clock synchronization errors between a transmitter and a receiver. The technique is particularly suitable for clock synchronization in networks where the transmitter and receiver are not driven from a common timing reference but the receiver requires timing reference traceable to the transmitter clock.
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Aweya James
Felske Kent
Montuno Delfin Y.
Ouellette Michel
Christopher & Weisberg P.A.
Ciena Corporation
Pathak Sudhanshu C
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