Clock synchronization of data streams

Details Clock synchronization of data streams Clock synchronization of data streams

2006-08-16

2010-02-02

Hafiz, Tariq R. (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Flow controlling

C710S008000, C710S015000, C710S052000

Reexamination Certificate

active

07657668

ABSTRACT:
A system synchronizes data flow between a first device and a second device. The system includes a data link that connects two or more devices that are capable of sending and receiving data through a bus. A capture device senses and transfer information through the bus. A ring buffer temporarily stores data transmitted through the bus. A read controller copies or reconstructs data in a length that is different from the length of the data received. A monitor detects underflow or overflow conditions into or out of the ring buffer and compensates for clock drift.

REFERENCES:
patent: 6594329 (2003-07-01), Susnow
patent: 6920578 (2005-07-01), Thompson et al.
patent: 2001/0014207 (2001-08-01), Kawamura et al.
patent: 2001/0040903 (2001-11-01), Negishi et al.
patent: 2006/0282566 (2006-12-01), Virdi et al.
patent: WO 2004/063931 (2004-07-01), None

Affiliated with

Also associated with

Rating

Clock synchronization of data streams does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock synchronization of data streams, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock synchronization of data streams will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4198726