Clock switching circuitry for jitter reduction

Details Clock switching circuitry for jitter reduction Clock switching circuitry for jitter reduction

2005-01-18

2005-01-18

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C327S099000, C716S030000

Reexamination Certificate

active

06845490

ABSTRACT:
Clock switching circuitry includes a clock switching control circuit for temporarily storing a clock select signal, which is input from the outside for selecting one of a plurality of clock signals different in phase from each other. The clock switching control circuit then outputs the clock select signal in accordance with the change in the level of a timing signal that switches the clock signals. A clock output circuit outputs one of the clock signals selected in accordance with the clock select signal. A masking circuit generates the timing signal while masking it to a preselected level by taking account of changes in the levels of the clock signals.

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