Clock supply apparatus and clock supply method

Details Clock supply apparatus and clock supply method Clock supply apparatus and clock supply method

2011-01-11

2011-01-11

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S032000

Reexamination Certificate

active

07868653

ABSTRACT:
According to one embodiment, a clock supply apparatus according to one embodiment of the invention includes a first transmission line connected to a clock generator that generates clock signals, a second transmission line connected to a clock supply destination having input impedance different from output impedance of the clock generator, a capacitor that capacitively couples the first and second transmission lines, a pull-up resistor that is provided on the first transmission line to suppress reflection of the clock signal, and a pair of voltage divider resistors that apply potential obtained by voltage division to the second transmission line as a reference potential of the clock signal. The impedance of the pair of voltage divider resistors on the second transmission line is set to match the input impedance of the clock supply destination.

REFERENCES:
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patent: 2006/0285417 (2006-12-01), Washburn et al.
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Japanese Office Action dated May 11, 2010, Japanese Patent Application No. 2009-086812.

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