Clock signal transmission circuit

Details Clock signal transmission circuit Clock signal transmission circuit

2005-02-15

2005-02-15

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

C326S041000, C257S059000, C327S277000, C327S284000, C375S371000, C375S373000

Reexamination Certificate

active

06856170

ABSTRACT:
A clock generator (10a) outputs either a first clock signal or a second clock signal. The second clock signal is higher in frequency than the first clock signal. Under control of a control signal (CNTL1), when the first clock signal and the second clock signal are outputted from the clock generator (10a), a selector (81a) transmits the first and second clock signals to a clock transmission line (42) and to a clock transmission line (41), respectively. The clock transmission line (41) is greater in linewidth than the clock transmission line (42). Under control of the control signal (CNTL1), a selector (82a) connects either the clock transmission line (41) or the clock transmission line (42) to the outside.

REFERENCES:
patent: 5559459 (1996-09-01), Back et al.
patent: 5892384 (1999-04-01), Yamada et al.
patent: 6127844 (2000-10-01), Cliff et al.
patent: 6417521 (2002-07-01), Inukai
patent: 6785354 (2004-08-01), Dietrich
patent: 10-209284 (1998-08-01), None

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