Clock signal supply method and system

Details Clock signal supply method and system Clock signal supply method and system

1989-08-09

1992-09-22

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 63, 328 72, 328 55, 307262, 307269, 307602, 307603, H03K 500, H03K 513

Patent

active

051500680

ABSTRACT:
The present invention provides a clock signal supply method and system. A reference signal and a synchronizing signal are generated, as well as a clock signal, at a clock signal generating source end. Both the reference signal and the synchronizing signal have a period longer than that of the clock signal. The clock signal at a clock signal destination end is frequency divided in synchronism with the synchronizing signal to provide a sample to be compared with the reference signal. The resultant frequency-divided signal is compared with the reference signal in phase. A delay control is made for the clock signal in accordance with the result of the comparison to adjust the phase of the clock signal at the signal destinations.

REFERENCES:
patent: 4309649 (1982-01-01), Naito
patent: 4461014 (1984-07-01), Fajino
patent: 4495473 (1985-01-01), Treise
Anceau, "A Synchronous Approach for Clocking VSLI System", IEEE Jor. Of SSC., vol. SC-17, No. 1, Feb. 1982.

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