Clock signal arrangement for regenerating a clock signal

Details Clock signal arrangement for regenerating a clock signal Clock signal arrangement for regenerating a clock signal

1985-10-07

1987-08-11

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 63, 328 72, 307269, H03K 500, H03K 117, H03K 700

Patent

active

046864822

ABSTRACT:
A clock signal arrangement comprises two phase-controlled loop (PLL) circuits each producing a regenerated clock signal c and r, respectively and a high-frequency oscillator signal, two time window signal generators each connected to one of the PLL circuits and also a logic circuit connected to the time window signal generators. The clock signal arrangement has for its object the regeneration of a clock signal which has a very high degree of accuracy as regards its frequency and phase. To that end, time window signals whose mutual position is a measure of the phase difference between the regenerated clock signals and whose width depends on the period duration of the oscillator signals are generated in each of the time window signal generators. In the logic circuit the time window signals clock one of the clock signals, which is only conveyed to an output terminal of the clock signal arrangement if the phase difference is less than half the duration of the period.

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