Clock shift circuit and synchronous semiconductor memory device

Details Clock shift circuit and synchronous semiconductor memory device Clock shift circuit and synchronous semiconductor memory device

1998-02-27

1999-12-14

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

36523001, G11C 1300

Patent

active

060026154

ABSTRACT:
A mask control circuit for generating an internal mask designation signal for masking read data includes a shift circuit incorporating and shifting an applied signal in accordance with an internal column related clock signal CLKD for transmission and a reset means responsive to inactivation of a clock activation signal defining a generation period of the internal column clock signal for resetting the shift circuit in an initial state. An output from the shift circuit is changed from the initial state to another upon clock reapplication, so that the influence by an internal output signal from the shift circuit in the previous application is eliminated, thereby generating a correct internal mask designation signal. A clock shift circuit capable of reducing current consumption without accompanying any malfunction and a synchronous semiconductor memory device using the same is provided.

REFERENCES:
patent: 5479374 (1995-12-01), Kobayashi et al.

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