Clock reproduction circuit and elements used in the same

Details Clock reproduction circuit and elements used in the same Clock reproduction circuit and elements used in the same

1995-03-10

1997-03-11

Chin, Wellington

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375374, 331 25, 327157, H03D 324

Patent

active

056109547

ABSTRACT:
A clock reproduction circuit produces a data clock from a data signal. The clock reproduction circuit includes a voltage controlled oscillator, a phase detector, a frequency error detection circuit and a charge pump whose output is controlled by the outputs of the phase detector and the frequency error detection circuit. A VCO clock output from the voltage controlled oscillator is synchronized with the data clock by the feedback loop consisting of these elements. The frequency error detection circuit detects a frequency error between the VCO clock and the data clock by detecting changes in the phases of the VCO clock at the transition edges of the data signal. Analog and digital frequency error detection circuits are used. Further, improved circuit elements in the clock reproduction circuit used.

REFERENCES:
patent: 4773085 (1988-09-01), Gordell
patent: 4780844 (1988-10-01), Keller
patent: 4803705 (1989-02-01), Gillingham et al.
patent: 5027085 (1991-06-01), DeVito
patent: 5173617 (1992-12-01), Alsup et al.
patent: 5455540 (1995-10-01), Williams
"A Si Bipolar Phase and Frequency Detector IC for Clock Extraction up to 8 Gb/s", Pottbacker et al, IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1747-1751.
"A 155-MHz Clock Recovery Delay-and Phase-Locked Loop", Lee et al, IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1736-1746.
"A Two-Chip 1.5 Gbd Serial Link Interface", Walker et al, IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1805-1811.
"A 200-MHz CMOS Phase-Locked Loop with Dual Phase Detectors", Ware et al, IEEE Journal of Solid-State Circuits, vol. 24, No. 6, Dec. 1989, pp. 1560-1568.
"A New Phase-Locked Timing Recovery Method for Digital Regenerators", Bellisio, pp. 10-17-10-20.

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