Clock regeneration circuit and optical signal receiver using...

Details Clock regeneration circuit and optical signal receiver using... Clock regeneration circuit and optical signal receiver using...

2005-02-01

2005-02-01

Fan, Chieh M. (Department: 2634)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C398S155000, C327S147000

Reexamination Certificate

active

06850584

ABSTRACT:
A clock regeneration circuit having a PLL circuit which includes a voltage control oscillator; a clock extraction circuit which includes a band passing filter and a harmonic component of a dividing signal of the oscillation frequency signal; a frequency detector; a filter; a bit rate detection circuit; and a frequency selection circuit outputting an oscillation frequency of the voltage control oscillator of the PLL circuit or a frequency signal obtained by dividing the oscillation frequency in response to the bit rate detected by the bit rate detection circuit, as a regeneration clock circuit.

REFERENCES:
patent: 5963608 (1999-10-01), Casper et al.
patent: 6347128 (2002-02-01), Ransijn
patent: 6498670 (2002-12-01), Yamashita et al.
patent: 6680970 (2004-01-01), Mejia
patent: 9-284258 (1997-10-01), None
patent: 9-326694 (1997-12-01), None
patent: 10-313277 (1998-11-01), None

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