Clock recovery PLL

Details Clock recovery PLL Clock recovery PLL

2005-10-25

2005-10-25

Tse, Young T. (Department: 2637)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S326000, C375S327000, C327S147000, C327S148000, C327S151000

Reexamination Certificate

active

06959064

ABSTRACT:
A multimode clock recovery circuit for providing constant bit rate services in a cell relay network has an embedded digital phase locked loop including an input circuit capable of generating a phase signal from at least two types of input signal. The phase signal controlling the output of the phase locked loop generates clock signals for the constant bit rate services.

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