Clock recovery circuitry

Details Clock recovery circuitry Clock recovery circuitry

2002-12-10

2009-08-18

Payne, David C (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C370S395620, C375S371000, C398S155000, C713S600000

Reexamination Certificate

active

07577226

ABSTRACT:
Clock recovery circuitry for recovering a clock signal from a data signal is disclosed. The clock recovery circuitry comprises sampling unit (46) for sampling the data signal at a plurality of sampling points, bit reversal detecting unit (48) for determining a sampling point at which the data signal changes state, selecting unit (50) for selecting a phase from amongst a plurality of candidate phases based on a sampling point at which the data signal is determined to change state, and phase setting unit (38) for setting the phase of the clock signal. The circuitry may be used to produce an estimate of a desired phase of the clock signal for supply to a phase locked loop. This can allow the phase locked loop to be brought quickly into lock.

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“High-Speed Clock & Data Recovery Macro for Data Transfer at 622 Mbits/sec”,Fujitsu Spectrum,No. 123, Jun. 2001, pp. 3-6.

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