Clock recovery circuit and related methods

Details Clock recovery circuit and related methods Clock recovery circuit and related methods

2006-03-21

2006-03-21

Bocure, Tesfaldet (Department: 2631)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S375000, C327S148000

Reexamination Certificate

active

07016450

ABSTRACT:
A clock recovery circuit for generating an output signal that is synchronized with an input signal. The clock recovery circuit includes a charge pump, a first filter, an oscillator, a switch circuit, and a second filter. When the charge pump operates, the switch circuit will disconnect the first filter from the oscillator. Additionally, when the charge pump stops operating, the switch circuit will connect the first filter and the oscillator such that the oscillator adjusts a frequency or phase of the output signal according to the output voltage of the first filter.

REFERENCES:
patent: 5047733 (1991-09-01), Nonaka et al.
patent: 5389899 (1995-02-01), Yahagi et al.
patent: 5497128 (1996-03-01), Sasaki
patent: 5548249 (1996-08-01), Sumita et al.
patent: 5847614 (1998-12-01), Gilbert et al.
patent: 5950115 (1999-09-01), Momtaz et al.
patent: 6057739 (2000-05-01), Crowley et al.
Wang Ruo-Peng, L I Shu-Guang, Zheng Zeng-Yu; A Clock and Data Recovery Circuit for 10-Mb/s and 100-Mb/s Ethernet; Microelectronics; Aug. 2002; p. 308-p. 311; vol. 32 No. 4.

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