Clock recovery circuit

Details Clock recovery circuit Clock recovery circuit

1997-03-26

1999-11-16

Vo, Don N.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375375, 375376, 331 10, 331 25, 327157, H03D 324

Patent

active

059870850

ABSTRACT:
A phase locked loop, which does not require a local reference clock to obtain a frequency lock. The circuit includes a frequency locked loop and a phase locked loop in which the frequency locked loop does not require a local reference clock. The frequency locked loop includes a transition counter having an input for data with an output connected to a charge pump. This charge pump is connected to a loop filter, which in turn is connected to a voltage controlled oscillator. The output of the voltage controlled oscillator is connected to a second input in the transition counter. The phase locked loop includes a phase detector with an input for data. The output of this phase detector is connected to a second charge pump, which has it output connected to the loop filter. The output of the voltage controlled oscillator also is connected to the input of the phase detector.

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M. Carnes et al., "Cycle Synchronized Phase Locked Loop"; IBM Technical Disclosre Bulletin; vol. 23, No. 1; Jun. 1, 1980; New York; pp. 81-82.

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