Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2007-04-17
2007-04-17
Ghayour, Mohammed (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S371000, C375S373000, C341S143000
Reexamination Certificate
active
10393277
ABSTRACT:
A clock recovery circuit comprises a phase comparator detecting phase differences between input data and sampling clocks and outputs them as pulse signals of two values of advanced and delayed, a low-pass filter reducing frequencies of the pulse signals outputted from the phase comparator and outputs reduced frequencies, a control signal generator monitoring the reduced frequencies and generates a phase control signal used to adjust the phase of each sampling clock to be small or large based on the ratio of the advanced and delayed signals, a phase interpolator adjusting the phase of each sampling clock upon receiving the phase control signal, and a frequency divider dividing the sampling clock having the adjusted phase by a predetermined frequency division ratio to output it, and controls the low-pass filter and control signal generator based on the frequency divided output.
REFERENCES:
patent: 4042781 (1977-08-01), Dragotinov
patent: 4628475 (1986-12-01), Azusawa et al.
patent: 5068628 (1991-11-01), Ghoshal
patent: 5812619 (1998-09-01), Runaldue
patent: 5886552 (1999-03-01), Chai et al.
patent: 6359948 (2002-03-01), Turudic et al.
patent: 6456128 (2002-09-01), Nakamura
patent: 6741668 (2004-05-01), Nakamura
patent: 6954506 (2005-10-01), Cho
patent: 2001/0026179 (2001-10-01), Saeki
patent: 2001/0038675 (2001-11-01), Zortea et al.
patent: 2002/0196889 (2002-12-01), Tamura et al.
patent: 2004/0094021 (2004-05-01), Ludwig
patent: 0 480 165 (1992-04-01), None
patent: 1-175427 (1989-07-01), None
patent: 5-268077 (1993-10-01), None
patent: 223147 (1996-08-01), None
patent: 10-285150 (1998-10-01), None
patent: 2001-210020 (2001-08-01), None
patent: WO 99/22482 (1999-05-01), None
File Erin M.
Ghayour Mohammed
Kabushiki Kaisha Toshiba
LandOfFree
Clock recovery circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Clock recovery circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock recovery circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3804333