Clock recovery circuit

Details Clock recovery circuit Clock recovery circuit

2006-12-12

2006-12-12

Vo, Don N. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C327S156000

Reexamination Certificate

active

07149270

ABSTRACT:
A clock recovery circuit for use with a high-speed data signal having a low signal to noise ratio is disclosed. The circuit includes a first phase locked loop circuit operating in a fast acquisition mode for acquiring the clock from a data signal, a second phase locked loop circuit for operating in a normal mode to recover the clock signal in the digital data signal once the first phase locked loop circuit has acquired the clock from the data signal, and a switch circuit responsive to switch control signals for switching between the first phase locked loop circuit and the second phase locked loop circuit after the first phase locked loop circuit has acquired the digital data signal.

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PCT Written Opinion dated Jun. 30, 2003.
Supplementary European Search Report dated Nov. 2, 2004.

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