Clock recovery circuit

Details Clock recovery circuit Clock recovery circuit

2006-11-14

2006-11-14

Ghebretinsae, Temesghen (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S354000, C327S147000

Reexamination Certificate

active

07136447

ABSTRACT:
A clock recovery circuit for establishing bit synchronization with a received signal. The clock recovery circuit comprises a conventional early-late gate circuit and a loop filter. The loop filter receives an output signal of an early sample circuit included in the early-late gate circuit and an output signal of a late sample circuit included in the early-late gate circuit to generate a control signal output. The control signal is input to a clock-producing device included in the early-late gate circuit. The clock-producing device generates a clock at an ideal impulse-producing time controlled by the control signal. The ideal impulse-producing time is a middle point of the n-th symbol of the received signal.

REFERENCES:
patent: 5134637 (1992-07-01), Beyer et al.
patent: 5757857 (1998-05-01), Buchwald

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