Clock recovery apparatus with means for sensing an out of lock c

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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331 4, 331 16, H04L 7033

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active

054736390

ABSTRACT:
An out of lock condition is sensed on a data transition by transition basis in clock recovery apparatus. When an out of lock condition is sensed, a range sweeping signal is generated and summed with the correction signal to sweep the frequency of the clock signal over the frequency range of the VCO. When an out of lock condition is absent, i.e., when the VCO is phase locked, simulated data transitions are generated in the frequency/phase detector. An out of lock condition is sensed by a D flip-flop. Data is coupled to the clock input of the flip-flop, the clock signal is delayed by a fraction of its nominal period and coupled to the D input of the flip-flop. The state of the Q output of the flip-flop indicates an out of lock condition.

REFERENCES:
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patent: 4523157 (1985-06-01), Sato
patent: 4933959 (1990-06-01), Knechtel
patent: 4942370 (1990-07-01), Shigemori
patent: 5012494 (1991-04-01), Lai et al.
patent: 5210509 (1993-05-01), Greeff et al.
patent: 5285483 (1994-02-01), Ogawa et al.
patent: 5315270 (1994-05-01), Leonowich

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