Clock recovery apparatus for phase shift keyed encoded data

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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328155, 331 23, 331 25, 375 87, 375120, H04L 2722

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active

043630022

ABSTRACT:
A pseudo clock generator produces pulses synchronous with, and having a period equal to one-half of the clock signal within a phase shift keyed encoded data stream. A phase lock circuit, having a stable period equal to that of the data clock signal tends to lock to the pseudo clock signal. Logic detects the condition of the phase lock signal being in phase lock with said data clock signal and in response thereto, masking circuitry prevents the pseudo clock generator from responding to input data transitions which occur outside of a predetermined masking window.

REFERENCES:
patent: 4010323 (1977-03-01), Peck
patent: 4167760 (1979-09-01), Decker
patent: 4234957 (1980-11-01), Tracey et al.

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