Clock recovery

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S371000, C375S373000, C375S354000, C375S355000

Reexamination Certificate

active

07873132

ABSTRACT:
A method and apparatus of recovering a clock signal from an input data signal consistent with certain embodiments, where the clock signal has a clock cycle equal to one data bit period, involves identifying an earliest transition time position in a sequence of data signal transitions; identifying a latest transition time position in the sequence of data signal transitions; calculating an approximate average transition time of the sequence of clock transitions; calculating a sampling time for sampling data in the input data signal as the approximate average transition time plus one half clock cycle; and adjusting a sampling clock time to approximate the sampling time. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

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