Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2008-09-30
2008-09-30
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S097000, C326S098000, C326S113000
Reexamination Certificate
active
10574236
ABSTRACT:
A semi-conductor component with a receiver, in particular a clock receiver circuit device, as well as a receiver, in particular a clock receiver circuit device is disclosed. The clock receiver circuit device includes a first input adapted to be connected with a first connection of a semi-conductor component, and second input adapted to be connected with a second connection of the semi-conductor component, wherein the receiver circuit device includes several, in particular more than three transfer gates.
REFERENCES:
patent: 5852378 (1998-12-01), Keeth
patent: 6184730 (2001-02-01), Kwong et al.
patent: 6292042 (2001-09-01), Kim et al.
patent: 6301322 (2001-10-01), Manning
patent: 2002/0140481 (2002-10-01), Tschanz et al.
patent: 2002/0175749 (2002-11-01), Hedberg et al.
Dicke, Billing & Czaja, PLLC
Infineon - Technologies AG
Tran Anh Q
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