Clock-pulse supply unit

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S360000, C375S357000, C375S373000, C370S217000

Reexamination Certificate

active

06937682

ABSTRACT:
In a clock-pulse supply unit, a first receiver unit is used to tap a central system clock pulse from the back panel. A time delay occurs in the first receiver unit. In order to compensate this time delay, a second receiver unit is used which is identical in construction to the first receiver unit and has the same time delay as the first receiver unit. A redundant clock pulse is supplied to the second receiver unit and thereby undergoes the same time delay as the central system clock pulse in the first receiver unit. The central system clock pulse and the redundant clock pulse can then be accurately compared with one another in a phase detector. The redundant clock pulse is then synchronized to the central clock pulse. The switchover from a slave clock pulse to the redundant clock pulse is effected only when synchronization is completed. This means that, in the event of disturbance of the slave clock pulse, the redundant clock pulse is synchronized to the disturbed clock pulse prior to the switchover and switchover is effected only when synchronization is completed. This has the advantage that no phase jump occurs at the instant of switchover.

REFERENCES:
patent: 5025310 (1991-06-01), Sekiya et al.
patent: 5442776 (1995-08-01), Masleid et al.
patent: 5619158 (1997-04-01), Casal et al.
patent: 5748569 (1998-05-01), Teodorescu et al.
patent: 6411665 (2002-06-01), Chan et al.
patent: 6760392 (2004-07-01), Tan et al.
patent: 652 642 (1995-05-01), None
Patent Abstracts of Japan Bd. 1999, Nr. 10, Aug. 31, 1999—JP 11 136633 Victor Co of Japan, Ltd., May 21, 1999.

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