Clock pulse shaver with selective enable pulse width

Details Clock pulse shaver with selective enable pulse width Clock pulse shaver with selective enable pulse width

2006-12-05

2006-12-05

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S401000

Reexamination Certificate

active

07146517

ABSTRACT:
A clock for a computing system. The clock includes a first pulse shaver and a first pin connected to the first pulse shaver. The first pin selectively enables the first pulse shaver to reduce the width of enabling pulses in a clock signal passing through the first pulse shaver. A method for synchronizing data flow in a computing system. The method includes generating pulses; selectively reducing the width of the pulses; and delivering the pulses to a memory element.

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