Clock generation systems and methods

Details Clock generation systems and methods Clock generation systems and methods

2005-05-24

2005-05-24

Perveen, Rehana (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S501000, C713S600000, C455S075000, C455S205000, C455S502000

Reexamination Certificate

active

06898721

ABSTRACT:
A low power reconfigurable processor core includes one or more processing units, each unit having a clock input that controls the performance of the unit; a wireless transceiver transmitting and receiving at a frequency based on a wireless clock input; and a controller having a plurality of clock outputs each coupled to the clock inputs of the processing units and the wireless clock input, the clock outputs being generated from a common master clock.

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