Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2011-01-18
2011-01-18
Payne, David C (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
Reexamination Certificate
active
07873134
ABSTRACT:
Disclosed herein are clock generator systems comprising first and second stage PLLs thereby allowing for both lower PLL bandwidth filtering and higher bandwidth response, in accordance with some embodiments. Other systems may be disclosed and/or described herein.
REFERENCES:
patent: 5787135 (1998-07-01), Clark
patent: 6266779 (2001-07-01), Kurd
patent: 6320424 (2001-11-01), Kurd
patent: 6611175 (2003-08-01), Heymann
patent: 6624674 (2003-09-01), Zhao
patent: 6670833 (2003-12-01), Kurd
patent: 7042259 (2006-05-01), Kurd
patent: 7282966 (2007-10-01), Narendra
patent: 2006/0001494 (2006-01-01), Garlepp et al.
Kurd Nasser A.
Venigalla Ravindra B.
Intel Corporation
Nordstrom Erik R.
Panwalkar Vineeta S
Payne David C
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