Clock-generating circuit for clock-controlled logic circuits

Details Clock-generating circuit for clock-controlled logic circuits Clock-generating circuit for clock-controlled logic circuits

1994-05-26

1995-08-08

Hudspeth, David R.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326 98, 327296, 327239, 327142, H03K 19096

Patent

active

054402506

ABSTRACT:
A clock-generating circuit for logic circuits with clock-controlled decoupling stages includes an interlock circuit which, in an interlocking mode, sets the outputs of the clock-generating circuit and thus, the clock lines, to an interlocking potential, thereby causing the decoupling stages to be placed into a shunt-current-free operating state.

REFERENCES:
patent: 3745380 (1973-07-01), Kitajima et al.
patent: 4379974 (1983-04-01), Plachno
patent: 4417158 (1983-11-01), Ito et al.
patent: 4554465 (1985-11-01), Koike
patent: 4641044 (1987-03-01), Shiraishi
patent: 4654599 (1987-04-01), Zbinden et al.
patent: 4815041 (1989-03-01), Baylock
patent: 4843254 (1989-06-01), Motegi et al.
patent: 4929854 (1990-05-01), Iino et al.
patent: 5047659 (1991-09-01), Ulrich
patent: 5140174 (1992-08-01), Meier et al.
patent: 5220217 (1993-06-01), Scarra et al.
patent: 5280203 (1994-01-01), Hung et al.
patent: 5315181 (1994-05-01), Schowe
Jacobus Pretorious, Alex Shubat & Andre Salama; "Analysis and Design Optimization of Domino CMOS Logic with Application to Standard Cells"; IEEE Journal of Solid-State Circuits, vol. SC-20, No. 2; Apr. 1985; pp. 523-530.
Vojin Oklobdzua & Robert Montoye; "Design-Performance Trade-Offs in CMOS-Domino Logic"; IEEE Journal of Solid State Circuits, vol. SC-21, No. 2; Apr. 1985; pp. 304-306.
Elecktronikpraxis, No. 1, Jan. 1993, p. 91.
Introduction to VLSI Systems, Addison-Wesley Publishing Company, 1980, pp. 229 to 233.

Affiliated with

Also associated with

Rating

Clock-generating circuit for clock-controlled logic circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock-generating circuit for clock-controlled logic circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock-generating circuit for clock-controlled logic circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-974122