Clock failure monitor circuit employing counter pair to indicate

Details Clock failure monitor circuit employing counter pair to indicate Clock failure monitor circuit employing counter pair to indicate

1980-12-29

1983-02-15

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307518, 307608, H03K 1332, H03K 17296

Patent

active

043743617

ABSTRACT:
A monitor circuit, for use in a switching system which detects pulse failures through use of a pair of timing counters. A flip-flop enables and clears such counter alternately in response to detection of the monitored pulse.

REFERENCES:
patent: 3350580 (1967-10-01), Harrison
patent: 3582795 (1971-06-01), Heick
patent: 3936745 (1976-02-01), Harrington
patent: 4023109 (1977-05-01), Shreve
patent: 4052676 (1977-10-01), Crittenden

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