Clock extraction circuit

Details Clock extraction circuit Clock extraction circuit

1997-09-12

2000-11-28

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375376, H03D 324

Patent

active

061545112

ABSTRACT:
A clock extraction circuit which is simplified in structure, improved in transmission efficiency, amenable to integration and size reduction and not limited by the operating speed of a phase comparator. An input signal frequency-divided by m and extracted clock signals outputted by a voltage-controlled oscillator and frequency-divided by n are phase-compared and an absolute value of the output of the phase comparator is taken by an absolute value circuit. An output of the absolute value circuit is passed through a low-pass filter to control the voltage-controlled oscillator for constituting the clock extraction circuit.

REFERENCES:
patent: 4114710 (1978-09-01), Katoh et al.
patent: 4164758 (1979-08-01), Kowal
patent: 4357943 (1982-11-01), Thompson et al.
patent: 4663844 (1987-05-01), Flora et al.
patent: 5394107 (1995-02-01), Shou et al.
patent: 5506531 (1996-04-01), Jang et al.
patent: 5635875 (1997-06-01), Kusakabe
IEEE J. of Solid-State Circuits Vo.29(12) Dec. 1994, pp. 1572-1576.
Digest of Technical Papers; 1994 International Solid-State Circuits Conference, pp. 110-111.
IEEE 1995 Custom Integrated Circuits Conference, pp. 99-102.

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