Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-12-14
2010-11-02
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S213000, C711SE12004
Reexamination Certificate
active
07827359
ABSTRACT:
Systems and/or methods that facilitate reading data from a memory component associated with a network are presented. A pre-fetch generation component generates a pre-fetch request based in part on a received read command. To facilitate a reduction in latency associated with transmitting the read command via an interconnect network component to which the memory component is connected, the pre-fetch request is transmitted directly to the memory component bypassing a portion of the interconnect network component. The memory component specified in the pre-fetch request receives the pre-fetch request and reads the data stored therein, and can store the read data in a buffer and/or transmit the read data to the requester via the interconnect network component, even though the read command has not yet reached the memory component. The read data is verified by comparison with the read command at a convergence point.
REFERENCES:
patent: 6047359 (2000-04-01), Fouts
Kim Matt
Rossiter Sean
Spansion LLC
Turocy & Watson LLP
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