Clock driver in semiconductor memory device

Details Clock driver in semiconductor memory device Clock driver in semiconductor memory device

2006-01-17

2006-01-17

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S233100, C327S158000

Reexamination Certificate

active

06987699

ABSTRACT:
A clock driver in a semiconductor memory device does not output a rising edge clock signal and a falling edge clock signal outputted from a DLL circuit when there are no data transmitted to a data output pin in a read operation. A clock driver which can reduce current consumption by suppressing output of a rising edge clock signal and a falling edge clock signal in a stand-by mode in a semiconductor memory device. The clock driver for use in a semiconductor memory device according to the present invention does not output a rising edge clock signal and a falling edge clock signal outputted from a DLL circuit when there is no data transmitted to a data output pin in a read operation.

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