Clock driver device and semiconductor memory apparatus...

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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Details

C365S233100, C365S189070, C365S233170

Reexamination Certificate

active

07916562

ABSTRACT:
A clock driver device includes a driving controller configured to generate a clock output enable signal enabled in response to an internal read pulse signal and disabled in response to a data output enable signal and an internal clock signal, and a clock driver configured to generate a driving clock signal by driving the internal clock signal in response to the clock output enable signal and a power-down signal.

REFERENCES:
patent: 6650594 (2003-11-01), Lee et al.
patent: 6678206 (2004-01-01), Chu et al.
patent: 6987699 (2006-01-01), Lee
patent: 2007-095267 (2007-04-01), None
patent: 1019980083817 (1998-05-01), None
patent: 1020010048881 (2001-06-01), None
patent: 1020060054610 (2006-05-01), None
patent: 1020070036560 (2007-04-01), None

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