Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2000-03-31
2003-11-04
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S400000, C713S401000, C713S503000
Reexamination Certificate
active
06643791
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to clock distribution schemes in telecommunications equipment and, more particularly, to a scalable architecture for distributing telecommunication clock signals in a network platform (e.g., a Next Generation Signaling Transfer Point (STP)) for use in Signaling System No. 7 (SS7) networks.
2. Description of Related Art
Out-of-band signaling establishes a separate channel for the exchange of signaling information between call component nodes in order to set up, maintain and service a call in a telephony network. Such channels, called signaling links, are used to carry all the necessary signaling messages between the nodes. Thus, for example, when a call is placed, the dialed digits, trunk selected, and other pertinent information are sent between network switches using their signaling links, rather than the trunks which will ultimately carry the bearer traffic, i.e., conversation.
Out-of-band signaling has several advantages that make it more desirable than traditional in-band signaling. First, it allows for the transport of more data at higher speeds than multi-frequency (MF) outpulsing used in the telephony networks of yore. Also, because of separate trunks and links, signaling can be done at any time in the entire duration of the call, not just at the beginning. Furthermore, out-of-band signaling enables signaling to network elements to which there is no direct trunk connection.
SS7 packet signaling has become the out-of-band signaling scheme of choice between telephony networks and between network elements worldwide. Three essential components are defined in a signaling network based on SS7 architecture. Signal Switching Points (SSPs) are basically telephone switches equipped with SS7-capable software that terminate signaling links. They generally originate, terminate, or switch calls. Signal Transfer points (STPs) are the packet switches of the SS7 network. In addition to certain specialized functions, they receive and route incoming signaling messages towards their proper destination. Finally, Signal Control Points (SCPs) are databases that provide information necessary for advanced call-processing and Service Logic execution.
As is well known, SS7 signaling architecture is governed by several multi-layered protocols standardized under the American National Standards Institute (ANSI) and the International Telecommunications Union (ITU) to operate as the common “glue” that binds the ubiquitous autonomous networks together so as to provide a “one network” feel that telephone subscribers have come to expect.
The exponential increase in the number of local telephone lines, mobile subscribers, pages, fax machines, and other data devices, e.g., computers, Information Appliances, etc., coupled with deregulation that is occurring worldwide today is driving demand for small form factor, high capacity STPs which must be easy to maintain, provide full SS7 functionality with so-called “five nines” operational availability (i.e., 99.999%. uptime), and provide the capability to support future functionality or features as the need arises. Further, as the subscriber demand for more service options proliferates, an evolution is taking place to integrate Intelligent Network (IN)-capable SCP functionality within STP nodes.
While it is generally expected that a single platform that supports large-database, high-transaction IN services as well as high-capacity packet switching (hereinafter referred to as a signaling server platform) will reduce equipment costs, reduce network facility costs and other associated costs while increasing economic efficiency, those skilled in the art should readily recognize that several difficulties must be overcome in order to integrate the requisite functionalities into a suitable network element that satisfies the stringent performance criteria required of telecommunications equipment. Daunting challenges arise in designing a compact enough form factor that is efficiently scalable, ruggedized, and modularized for easy maintenance, yet must house an extraordinary constellation of complex electronic circuitry, e.g., processors, control components, timing modules, I/O, line interface cards which couple to telephony networks, etc., that is typically required for achieving the necessary network element functionality. Whereas the electronic components may themselves be miniaturized and modularized into cards or boards, interconnecting a large number of such cards via suitable bus systems and controlling such interconnected systems poses many obstacles.
The existing interconnecting schemes used in today's telecommunications equipment are beset with numerous deficiencies and drawbacks in this regard, which rely on hardwiring of the cards for coding card locations, etc. (i.e., strapping) in the equipment's housing that is typically compartmentalized into a number of shelves. Because of hard-coded locations, card replacement in such systems becomes an unwieldy exercise in memorization of locations of virtually hundreds of cards disposed in a system. It should be apparent that such an arrangement is not only hard on service technicians called upon to replace malfunctioning or defective cards, but upgradeability and scalability of the system are also hampered thereby. Moreover, the problem is particularly compounded especially where the cards may have to be arranged in some hierarchical fashion, because both card locations and card levels in the hierarchy are hard-coded. In addition, beyond the physical difficulties relating to maintenance, card replacement and repair, et cetera, providing tightly controlled internal clock signals (i.e., telecommunication clocks) in a reliable manner to the cards for synchronization (which is an essential aspect of the operation of a telecommunications switching/routing device) becomes a formidable task in the state-of-the-art solutions when a highly scalable architecture is required.
Further, as those skilled in the art should readily appreciate, current techniques for collecting alarm and status data from a huge number of sources (typically the cards themselves) in telecommunications equipment are inadequate because they require running separate cables from each alarm source to a centralized controller of the system. Clearly, with thousands of cards that may be needed for achieving the necessary network element functionality, such an arrangement creates an unmanageable cabling problem with attendant potential reliability hazards. Moreover, such concerns are heightened when small form factor requirements are imposed.
SUMMARY OF THE INVENTION
Accordingly, the present invention is, in one aspect, directed to a signaling server disposed in a telecommunications network which comprises a multi-stage clock distribution system to distribute a system clock to a plurality of line interface cards organized into one or several link shelves. An administrator shelf is provided for including circuitry for controlling the link shelves. Shelves and line interface cards are uniquely identified without resorting to hardwired strapping. The multistage clock distribution system includes a system timing generator (STG) disposed in the administrator shelf for generating a system clock at a predetermined frequency based a reference input. The STG also includes circuitry for producing a framed control signal which is used for effectuating a shelf ID assignment scheme and for controlling the system clock distribution based thereon. At least one level of clock distribution modules (CDMs) are coupled to the STG, wherein each CDM receives the system clock and the framed control signal. Circuitry is disposed in the CDMs for providing a fan-out of the system clock to a plurality of ports of the CDMs based on port address information contained in the framed control signal and the level of the CDMs, wherein at least one of the CDMs comprises a rack-level CDM. A plurality of bus control modules (BCMs) are coupled to the rack-level CDM. Each BCM interfaces with at lea
Alcatel
Danamraj & Youst
Hoersten Craig A.
Lee Thomas
Nieves Michael
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