Clock design apparatus and clock design method

Details Clock design apparatus and clock design method Clock design apparatus and clock design method

2006-04-11

2009-06-02

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07543258

ABSTRACT:
A clock design apparatus includes a delay time adjusting section, a prohibition specifying section and a clock tree synthesis section. The delay time adjusting section is configured to adjust signal delay time of signal propagation paths on a semiconductor integrated circuit to be designed. The prohibition specifying section is configured to specify a part of the signal propagation paths as a circuit prevented from being changed. The clock tree synthesis section is configured to synthesize a clock tree of the semiconductor integrated circuit in accordance with the specification made by the prohibition specifying section.

REFERENCES:
patent: 5336940 (1994-08-01), Sorrells et al.
patent: 5670903 (1997-09-01), Mizuno
patent: 6782519 (2004-08-01), Chang et al.
patent: 6907585 (2005-06-01), Kohno
patent: 6910202 (2005-06-01), Minami et al.
patent: 7096442 (2006-08-01), Lu et al.
patent: 7159200 (2007-01-01), Yoneda
patent: 7187742 (2007-03-01), Logue et al.
patent: 2006/0061401 (2006-03-01), Shiratake et al.
patent: 2006/0114048 (2006-06-01), Shiratake
patent: 07-098617 (1995-04-01), None
T. Fujiyoshi et al., “An H.264/MPEG-4 Audio/Visual Codec LSI with Module-Wise Dynamic Voltage/Frequency Scaling,” International Solid-State Circuits Conference Digest of Technical Papers, 2005.
T. Kitahara et al., “Low-Power Design Methodology for Module-Wise Dynamic Voltage and Frequency Scaling with Dynamic De-Skewing Systems,” Proceedings Asia and South Pacific Design Automation Conference, 2006.

Affiliated with

Also associated with

Rating

Clock design apparatus and clock design method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock design apparatus and clock design method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock design apparatus and clock design method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4102075