Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2005-12-27
2005-12-27
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S501000, C713S502000, C713S503000, C713S600000, C375S344000, C375S345000, C375S346000, C714S700000, C714S704000, C714S716000
Reexamination Certificate
active
06981168
ABSTRACT:
A clock data recovery system is provided for resampling a clock signal according to an incoming data signal stream. It comprises a clock generator for generating said clock signal wherein one of the frequency and phase of that clock signal is dependent upon a control signal. It is further provided a phase detector operable to detect the phase difference between said clock signal and said incoming data signal stream and is operable to generate a phase difference signal. A loop controller has a variable-gain and is operable to control said clock generator by generating said control signal. That control signal is dependent in said phase difference signal and that variable-gain. The variable-gain is dependent upon a transition rate of the incoming data signal stream. The loop controller can comprise a low-pass filter to generate from the phase difference signal a low-pass filered phase signal and to adjust the bandwidth of the clock data recovery system. The loop controller further can comprise a variable-gain element to amplify the filtered signal in accordance with a received bit transition rate provided by a bit transition detector and a density calculator.
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Menofli Christian
Morf Thomas
Schmatz Martin
Browne Lynne H.
Cheung, Esq. Wan Yee
Keusey, Tutunjian & & Bitetto, P.C.
Patel Nitin C.
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