Clock controlled exclusive or circuit

Details Clock controlled exclusive or circuit Clock controlled exclusive or circuit

1998-06-19

2000-06-27

Santamauro, Jon

Electronic digital logic circuitry

Exclusive function

With field-effect transistor

326 95, 326 98, H03K 1921

Patent

active

060811307

ABSTRACT:
An exclusive OR circuit (10) includes an input stage (11) and a control arrangement (12,13) for controlling an exclusive OR logical evaluation. The control arrangement includes a pre-charge stage (12) which responds to a first level clock signal to enable the desired exclusive OR logical evaluation. The input stage (11) is connected to receive a first input signal and a second input signal and is also connected to an evaluation node (23). When the logic state of one input signal is unequal to the logic state of the other input signal, the input stage (11) couples the evaluation node (23) to ground. An output stage (13) of the control arrangement inverts the signal at an internal node (24) to produce the output from the exclusive OR circuit. A pre-charge stage (12) couples the internal node (24) to the evaluation node (23) only in response to a "high" clock signal. Coupling the internal node (24) and evaluation node (23) allows the internal node to follow the state of the evaluation node and produce the desired exclusive OR evaluation through the output stage (13).

REFERENCES:
patent: 4233524 (1980-11-01), Burdick
patent: 4710650 (1987-12-01), Shoji
patent: 5117133 (1992-05-01), Luebs
patent: 5508640 (1996-04-01), Partovi et al.
patent: 5508641 (1996-04-01), Appenzeller et al.
patent: 5777491 (1998-07-01), Hwang et al.
patent: 5942916 (1999-08-01), Matsbara et al.

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