Clock control apparatus and method, for a memory controller,...

Details Clock control apparatus and method, for a memory controller,... Clock control apparatus and method, for a memory controller,...

2006-08-01

2006-08-01

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

C713S322000, C713S320000

Reexamination Certificate

active

07085941

ABSTRACT:
A clock control apparatus for a memory controller comprises an interface unit which processes a block access to a plurality of banks of an SDRAM as a single continuous macro access in order to perform arbitration of the macro access, the block access externally supplied to the memory controller. A power-saving control unit controls both a clock signal of an internal circuit of the memory controller and a clock enable signal of the SDRAM in response to a control signal supplied from the interface unit.

REFERENCES:
patent: 5600605 (1997-02-01), Schaefer
patent: 6008823 (1999-12-01), Rhoden et al.
patent: 6340973 (2002-01-01), Ochiai et al.
patent: 6438660 (2002-08-01), Reams
patent: 09-180438 (1997-07-01), None
patent: 409180438 (1997-07-01), None

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