Clock circuitry for programmable logic devices

Details Clock circuitry for programmable logic devices Clock circuitry for programmable logic devices

2007-10-02

2007-10-02

Le, Don (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S038000, C326S093000

Reexamination Certificate

active

11239702

ABSTRACT:
A programmable logic device includes high-speed serial interface (“HSSI”) circuitry that employs one or more clock signals. In addition to use of these clock signals in the HSSI circuitry, circuitry is provided for allowing at least one of these signals to be distributed throughout the PLD core circuitry, e.g., for use as an additional clock signal in the PLD core. Clock distribution is preferably done in a low-skew way.

REFERENCES:
patent: 6463547 (2002-10-01), Bailey et al.
patent: 6867616 (2005-03-01), Venkata et al.
patent: 7075365 (2006-07-01), Starr et al.
patent: 2001/0033188 (2001-10-01), Aung et al.
patent: 2004/0161070 (2004-08-01), Yin et al.

Affiliated with

Also associated with

Rating

Clock circuitry for programmable logic devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock circuitry for programmable logic devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock circuitry for programmable logic devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3822881