Clock circuit for reducing long term jitter

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S147000

Reexamination Certificate

active

07816959

ABSTRACT:
A clock circuit generates a reference clock signal based on a resonant frequency of a crystal, generates thermometer-coded signals based on the reference clock signal, and generates a pulse train based on the thermometer-coded signals. The pulse train has a frequency that is a multiple of the frequency of the reference clock signal. Additionally, the clock circuit includes a phase-lock loop for generating an output clock signal based on the pulse train and aligning a phase of the output clock signal with pulses in the pulse train. In various embodiments, the frequency of the reference clock signal is the same as the resonant frequency of the crystal and the frequency of the output clock signal is a multiple of the resonant frequency of the crystal. Moreover, reference clock signal and the output clock signal each have a long-term jitter based on the precision of the resonant frequency of the crystal.

REFERENCES:
patent: 4712078 (1987-12-01), Slobodnik et al.
patent: 5796358 (1998-08-01), Shih et al.
patent: 5808573 (1998-09-01), Shih et al.
patent: 6161003 (2000-12-01), Lo Curto et al.
patent: 6310653 (2001-10-01), Malcolm et al.
patent: 6342798 (2002-01-01), Yoshida
patent: 6583654 (2003-06-01), Kim et al.
patent: 6658748 (2003-12-01), Leipold et al.
patent: 6744324 (2004-06-01), Adams et al.
patent: 6961013 (2005-11-01), Lin et al.
patent: 6987409 (2006-01-01), Kim et al.
patent: 7019677 (2006-03-01), Soman et al.
patent: 7088275 (2006-08-01), Waltari
patent: 7352297 (2008-04-01), Rylyakov et al.
patent: 7403073 (2008-07-01), Kossel et al.
patent: 7483508 (2009-01-01), Staszewski et al.
patent: 7492850 (2009-02-01), Menolfi et al.
patent: 7639086 (2009-12-01), Lee et al.
patent: 7679459 (2010-03-01), Menolfi et al.
patent: 7724862 (2010-05-01), Menolfi et al.
patent: 2002/0009170 (2002-01-01), Schmatz
patent: 2004/0160250 (2004-08-01), Kim et al.
patent: 2004/0218705 (2004-11-01), Cranford et al.
patent: 2007/0047689 (2007-03-01), Menolfi et al.
patent: 2007/0146024 (2007-06-01), Allan
patent: 2008/0292040 (2008-11-01), Menolfi et al.
patent: 2009/0002082 (2009-01-01), Menolfi et al.
patent: 2009/0128201 (2009-05-01), Chen et al.
patent: 2009/0129524 (2009-05-01), Chen et al.
patent: 2009/0174492 (2009-07-01), Zhang

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