Clock and data recovery circuits

Details Clock and data recovery circuits Clock and data recovery circuits

2005-05-02

2010-06-08

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S360000, C375S371000

Reexamination Certificate

active

07734000

ABSTRACT:
A clock and data recovery circuit comprising a phase detection circuit, first and second oscillators, and a flip-flop. The phase detection circuit outputs a detection signal according to a significant transition of an input signal. Each oscillator receives the detection signal and operates alternately in a clock and data recovery mode and a phase-locked mode. When the first oscillator operates in the clock and data recovery mode and outputs a first clock to control the flip-flop to output an output signal, the second oscillator operates in the phase-locked mode to adjust a frequency of a second clock. Before switching to the clock and data recovery mode, the second oscillator synchronizes the second clock with the first clock.

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