Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2005-08-09
2005-08-09
Fan, Chieh M. (Department: 2634)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S374000, C327S157000, C327S158000, C713S500000
Reexamination Certificate
active
06928128
ABSTRACT:
Clock alignment circuits and techniques for reducing power dissipation, increasing power supply noise immunity, decreasing process and temperature variation sensitivity, and providing a wide operating range. A power supply generator generates an isolated supply voltage for a delay line used in a clock alignment circuit. The delay line generates a delayed clock from a reference clock. A comparator detects a correction information (i.e., delay or phase error) between the delayed clock and the reference clock and generates error information representative of the correction information. A charge pump circuit converts the error information into a voltage signal, wherein the voltage signal is a scaled representation of the error information. The power supply generator includes an amplifier having a first input coupled to the voltage signal and an output to provide the supply voltage and a capacitor coupled between the supply voltage and a ground voltage, wherein the amplifier tracks the voltage signal level to regulate the supply voltage.
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Fan Chieh M.
Rambus Inc.
Vierra Magen Marcus Harmon & DeNiro LLP
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