Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2011-02-15
2011-02-15
Ellis, Kevin L (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S006000, C711S205000, C711S156000
Reexamination Certificate
active
07890731
ABSTRACT:
An instruction is provided to perform clearing of selected address translation buffer entries (TLB entries) associated with a particular address space, such as segments of storage or regions of storage. The buffer entries related to segment table entries or region table entries or ASCE addresses. The instruction can be implemented by software emulation, hardware, firmware or some combination thereof.
REFERENCES:
patent: 4432053 (1984-02-01), Gaither et al.
patent: 4779188 (1988-10-01), Gum et al.
patent: 5307502 (1994-04-01), Watanabe et al.
patent: 5317705 (1994-05-01), Gannon et al.
patent: 5317710 (1994-05-01), Ara et al.
patent: 5423014 (1995-06-01), Hinton et al.
patent: 5471593 (1995-11-01), Branigin
patent: 5500948 (1996-03-01), Hinton et al.
patent: 5555394 (1996-09-01), Arakawa et al.
patent: 5615354 (1997-03-01), Hill et al.
patent: 5761734 (1998-06-01), Pfeffer et al.
patent: 5771365 (1998-06-01), McMahan et al.
patent: 592853 (1999-07-01), Yamada
patent: 5928353 (1999-07-01), Yamada
patent: 5946717 (1999-08-01), Uchibori
patent: 6079013 (2000-06-01), Webb et al.
patent: 6119204 (2000-09-01), Chang et al.
patent: 6119219 (2000-09-01), Webb et al.
patent: 6260130 (2001-07-01), Liedtke
patent: 6308255 (2001-10-01), Gorishek, IV et al.
patent: 6467007 (2002-10-01), Armstrong et al.
patent: 6587964 (2003-07-01), Brooks
patent: 6604187 (2003-08-01), McGrath et al.
patent: 6978357 (2005-12-01), Hacking et al.
patent: 7197585 (2007-03-01), Farrell et al.
patent: 7231506 (2007-06-01), Ike
patent: 2002/0029357 (2002-03-01), Charnell
patent: 2004/0064618 (2004-04-01), Farrell et al.
patent: 2004/0230749 (2004-11-01), Slegel et al.
patent: 2004/0230976 (2004-11-01), Slegel et al.
patent: 3825028 (1987-07-01), None
patent: 195 16 949 (1998-02-01), None
patent: 199 34 515 (2000-01-01), None
patent: 0206653 (1986-06-01), None
patent: 8220451 (1987-05-01), None
patent: 1182570 (2001-05-01), None
patent: 58150195 (1983-09-01), None
patent: 58150196 (1983-09-01), None
patent: WO 02/086730 (2002-02-01), None
“Query Evaluation Techniques for Large Databases”,G. Graefe; ACM Computing Surveys, vol. 25, No. 2, Jun. 1993, pp. 73-170.
“Tree Bitmap: Hardware/Software IP Lookups with Incremental Updates”, W. Eatherton et al., ACM SIGCOMM Computer Communications Review, vol. 34 No. 2, Apr. 2004, pp. 97-119.
Storage-Key-Exception Control, J. R. Batwell, IBM Technical Disclosure Bulletin, vol. 24, No. 3, Aug. 1981.
Enterprise Systems Achitecture/390 Principles of Operation, XP-002294122, pp. 10-1; 10-26; 10-27, Jul. 31, 2001.
Key-Sequence Data Sets on Indelible Storage, Inspec 2746447, MC Easton, IBM Journal of Research and Development, vol. 30, No. 3, pp. 230-241, May 1986.
“z/Architecture Principles of Operation,” IBM Publication No. SA22-7832-00, Dec. 2000, Chapter 3, pp. 1-49; Chapter 10, pp. 18-19 and 29-30. 1026 pages.
Delphion listing showing docket family of DE3825028 including US5317710 (previously submitted) and a view showing English translation of the abstract of the DE3825028C2, publication date: Jan. 7, 1993.
Patent Cooperation Treaty from the International Searching Authority, Date of mailing Sep. 9, 2004, International Application No. PCT/GB2004/001971, International filing date May 6, 2004, 9 pages.
European Patent Office, Extended European Search Report, Reference POU920030050EP2, Date of mailing Oct. 10, 2006, Application No. 05108507.4, 7 pages.
European Patent Office, Partial European Search Report, Reference POU920030050EP3, Date of mailing Apr. 6, 2006, Application No. 05108510.8-2211, 5 pages.
European Patent Office, Extended European Search Report, Reference POU920030050EP3, Date of mailing Jun. 21, 2006, Application No. 05108510.8-2211, 9 pages.
European Patent Office, Extended European Search Report, Reference POU920030050EP4, Date of mailing Aug. 16, 2006, Application No. 06116358.0, 6 pages.
European Patent Office, Extended European Search Report, Reference POU920030050EP5, Date of mailing May 28, 2008, Application No. 08150756.8-1229, 7 pages.
The Patent Office Patents Directorate, Search and Examination Report, Reference: POU920030050GB2, Application No. GB0518904.8, Oct. 31, 2005, 5 pages.
The Patent Office Patents Directorate, Search and Examination Report, Reference: POU920030050GB3, Application No. GB0518901.4, Oct. 31, 2005, 3 pages.
Heller Lisa C.
Pfeffer Erwin F.
Plambeck Kenneth E.
Slegel Timothy J.
Campbell John E.
Ellis Kevin L
International Business Machines - Corporation
LandOfFree
Clearing selected storage translation buffer entries based... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Clearing selected storage translation buffer entries based..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clearing selected storage translation buffer entries based... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2631072