Semiconductor device manufacturing: process – Chemical etching – Having liquid and vapor etching steps
Reexamination Certificate
2000-05-26
2002-03-12
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
Having liquid and vapor etching steps
C438S745000, C438S906000, C134S026000
Reexamination Certificate
active
06355568
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to an integrated circuit (IC) fabrication method. More particularly, the invention relates to a cleaning method for a copper dual damascene process.
2. Description of Related Art
In an ultra large-scale integration (ULSI) circuit, a multilevel interconnects design is usually adopted to prevent an increased density of the interconnects in a highly integrated circuit. Typically, a copper (Cu) dual damascene process is widely practiced in most semiconductor industry, since Cu is excellent in mitigating problems such as electromigration in certain metal layers, and a RC time delay in transmitting an electrical signal between the metal interconnects.
In a backend process of the dual damascene process, it is essential to remove process contaminants, such as copper oxide (CuO
x
), particles, and polymers that remain after the etching step is performed to form an opening. The process contaminants are removed using a solvent in a conventional cleaning step. However, without a thorough clean, remnants from the cleaning step appear in the opening. As the integration of the IC increases, its process window decreases, while the remnants in the opening have a larger impact for the subsequent process. For instance, this leads to a higher via resistance for a product device.
SUMMARY OF THE INVENTION
The invention provides a cleaning method for a copper dual damascene process, which method effectively removes the remnants on the copper layer to obtain a wider process window, as well as a lower via resistance.
As embodied and broadly described herein, the invention provides a cleaning method for a copper dual damascene process, applicable for cleaning a structure having a dual damascene opening. The method begins with preparing a first chemical solution and a second chemical solution. The first chemical solution includes deionized water, hydrogen peroxide, and surfactant, whereas the second chemical solution includes deionized water, hydrogen fluoride, and hydrogen chloride. A first cleaning step is performed using the first chemical solution to remove particles and polymers that remain on a surface of a copper layer and the dual damascene opening.
A second cleaning step is then performed using the second chemical solution to remove a copper oxide layer on the copper layer. The dual damascene opening is filled with another copper layer to complete the dual damascene fabrication process.
Since the dual damascene structure is cleaned using two different chemical solutions, instead of using a conventional cleaning solvent, particles, polymers, and copper oxide layer are completely removed from the surface of the copper layer. As a result, a wider process window is obtained, together with a lower via resistance.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6066028 (2000-05-01), Cheng et al.
patent: 6127282 (2000-10-01), Lopatin
patent: 10172942 (1998-06-01), None
Wang Sung-Hsiung
Yang Chan-Lon
Everhart Caridad
J. C. Patents
United Microelectronics Corp.
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