Classification of the variables in a system of simultaneous...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

06532569

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of computer simulation of analog and mixed signal digital-analog physical circuits and systems, and more particularly to the reduction of a system of simultaneous equations describing the analog and mixed signal digital-analog physical circuits and systems to be simulated.
BACKGROUND OF THE INVENTION
Hardware description languages such as VHDL-AMS allow a user to write simulation models of physical devices by expressing their behavior using statements of the language. Continuous time (often called analog) behavior is described by statements that express differential-algebraic equations. Such equations are called explicit equations.
When many instances of such models are connected together to form a hierarchical design, the explicit equations from each instance, together with implicit equations resulting from declarations and the interconnection of the instances, and equations supplied by the simulator, are combined into a system of simultaneous equations with many unknowns. Some implicit equations due to interconnections are a consequence of the conservation laws (Kirchhoff's voltage and current laws in electrical systems; equivalent laws exist in other systems such as thermal, fluidic, etc.). The conservation laws require that the potential of all terminals connected to form a node be equal, and that the flow (in electrical systems, current) into each node sum up to zero.
It is known that for the system of simultaneous equations to be solvable there must be as many equations as there are unknowns. The system of simultaneous equations is typically very sparse (i.e., most equations in the system involve relatively few variables), and in most situations the system of simultaneous equations can be compacted (reduced in size). Compacting the systems of simultaneous equations is beneficial because the computational effort to solve a system of simultaneous equations is of the order n
k
, where n is the size of the system of simultaneous equations and k is a number larger than one that depends on the particular system of simultaneous equations. Therefore, reducing the size of the system of simultaneous equations provides for a more efficient solution, making the simulation more efficient.
There are known approaches, called tearing methods, that reduce a system of equations without significantly changing the sparsity of the system. These methods operate on fully assembled system of equations and identify certain unknowns as “input variables” and “output variables” of the system of equations. Input variables are those unknowns that either have fixed values or that depend on only other input variables. Output variables are those unknowns whose values do not feed back into the solution or that affect only other output variables. The identification of input variables and output variables allows those variables and their defining equations to be removed from the system of simultaneous equations, since input variables can be evaluated prior to the simultaneous solution, and output variables afterwards. But because tearing methods start with a fully assembled system of simultaneous equations, the effort required to reduce the size of the system of simultaneous equations is generally large.
Accordingly, a need exists for a way to reduce the size of a system of simultaneous equations by reducing a system of simultaneous equations based on individual models in the physical circuit or system before the complete system of simultaneous equations is assembled.
SUMMARY OF THE INVENTION
A simulator analyzes the behavior of analog and mixed signal digital-analog physical circuits and systems in a digital computer, using suitable models for each component in the physical circuit or system. According to the invention, sub-systems of simultaneous equations are assembled for each model. The variables in each sub-system of simultaneous equations are classified and the size of the sub-systems reduced. Finally, the system of simultaneous equations describing the physical circuit or system as a whole is assembled from the reduced sub-systems of simultaneous equations, and can be solved.


REFERENCES:
patent: 1 067 467 (2000-06-01), None
Frey, P. et al., “SEAMS: simulation environment for VHDL-AMS”, Dec. 1998, IEEE, pp. 539-546.*
Damon, D. et al., “Introduction to VHDL-AMS. 1. Structural and discrete time concepts”, Nov. 1996, IEEE, pp. 264-269.*
Borchers, C., “Symbolic behavioral model generation of nonlinear analog circuits”, Oct. 1998, IEEE, pp. 1362-1371.*
Christen, E. et al., “VHDL 1076.1-analog and mixed-signal extensions to VHDL”, Sep. 1996, IEEE, pp. 556-561.*
S. E. Mattson, M. Anderson, K. J. Astrom, “Object-oriented Modeling and Simulation”, in “CAD for Control Systems”, D. A. Linkens (Ed.), Marcel Dekker, New York, Basel, Hong Kong, 1993, pp. 57-69.
I.S. Duff, A. M. Erisman, J. K. Reid, “Direct Methods for Sparse Matrices”, “Chapter 6 Reduction to Block Triangular Form”, Clarendon Press, Oxford, 1986, reprinted 1992, pp. 104-113.
I.S. Duff, A. M. Erisman, J. K. Reid, “Direct Methods for Sparse Matrices”, “Chapter 11 Partitioning, Matrix Modification, and Tearing”, Clarendon Press, Oxford, 1986, reprinted 1992, pp. 241-263.
C.-W. Ho, A. E. Ruehli, P. A. Brennan, “The Modified Nodal Approach to Network Analysis”, IEEE Trans. Circ. Sys., vol. CAS-22, No. 6, Jun. 1975, pp. 504-509.

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