Static information storage and retrieval – Read/write circuit – Including signal clamping
Patent
1998-01-29
1999-04-06
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Including signal clamping
365190, 365175, G11C 700
Patent
active
058927174
ABSTRACT:
A digital-data-transmission-line circuit for actively clamping transmission signal and signal-complement amplitudes so as to reduce pattern-related jitter at a receiver/analyzer. The circuit includes a pair of opposing diode devices, where each diode device is coupled across the pair of conducting wires that make up the transmission line. The diode devices clamp the difference in potential between the two transmission lines so that the signal amplitude seen at the receiver will not vary to significantly with the number of like pulses that are transmitted in succession. In this manner, the present invention reduces pattern-dependent jitter in the cross-over from HIGH to LOW as seen at the receiver. By means of the parasitic capacitance accompanying the diode devices, the circuit of the present invention additionally provides some high-frequency filtering and smoothing of the waveform of the received signal.
REFERENCES:
patent: 4654549 (1987-03-01), Hannington
patent: 4675551 (1987-06-01), Stevenson et al.
patent: 4771191 (1988-09-01), Estrada
patent: 5239559 (1993-08-01), Brach et al.
patent: 5589813 (1996-12-01), Nielsen
patent: 5714900 (1998-02-01), Ehlers
Atwood Pierce
Caseiro Chris A.
Fairchild Semiconductor Corporation
Le Vu A.
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