Clamp circuit and boosting circuit using the same

Details Clamp circuit and boosting circuit using the same Clamp circuit and boosting circuit using the same

2005-03-08

2005-03-08

Le, Dinh T. (Department: 2816)

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

C327S536000

Reexamination Certificate

active

06865116

ABSTRACT:
The present invention relates to a clamp circuit and a boosting circuit using the same. In order to drop a boosting voltage to a target word line voltage, at least one or more clamp circuit is provided. At least one or more of the clamp circuits are independently driven in a desired sensing period to lower the boosting voltage. Thus, rapid read access time is accomplished upon a data read operation. Current consumption can be minimized and a stabilized word line voltage can be generated.

REFERENCES:
patent: 6111449 (2000-08-01), Tobita
patent: 6492862 (2002-12-01), Nakahara
patent: 6545917 (2003-04-01), Kim
patent: 6577514 (2003-06-01), Shor et al.

Affiliated with

Also associated with

Rating

Clamp circuit and boosting circuit using the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clamp circuit and boosting circuit using the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clamp circuit and boosting circuit using the same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3426268